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X-WR-CALDESC:Events for Silicon Valley Engineering Council
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DTSTART;TZID=America/Los_Angeles:20260410T120000
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DTSTAMP:20260410T031340
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LAST-MODIFIED:20260215T170305Z
UID:77763-1775822400-1775826000@svec.org
SUMMARY:Using Architectural Simulation to Investigate Chiplets for Scalable and Cost Effective HPC Beyond Exascale
DESCRIPTION:[]Chiplets have become a compelling approach to scaling and heterogeneous integration e.g. integrating workload-specific processors and massive bandwidth memory systems into computing systems; integrating die from multiple function-optimized process nodes into one product; integrating silicon from multiple businesses into one product. Chiplet-based products have been produced in high volume by multiple companies using proprietary chiplet ecosystems. Recently\, the community has proposed several new standards (e.g.\, UCIe) to facilitate integration and interoperability of any compliant chiplet. Hyperscalers (e.g.\, Google\, Amazon) are actively designing high volume products with chiplets through these open interfaces. Other communities are exploring the end-to-end workflow and tooling to assemble chiplet-based products. High performance computing can benefit from this trend. However\, the performance\, power\, and thermal requirements unique to HPC\, present many challenges to realizing a vision for affordable\, modular HPC using this new approach. Architectural modeling and simulation will play a critical role in pathfinding for this new potential direction for HPC beyond Exascale.\nSpeaker(s): John Shalf\,\nVirtual: https://events.vtools.ieee.org/m/539463
URL:https://svec.org/event/using-architectural-simulation-to-investigate-chiplets-for-scalable-and-cost-effective-hpc-beyond-exascale/
LOCATION:Virtual: https://events.vtools.ieee.org/m/539463
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260410T150000
DTEND;TZID=America/Los_Angeles:20260410T163000
DTSTAMP:20260410T031340
CREATED:20260308T183355Z
LAST-MODIFIED:20260308T183355Z
UID:77848-1775833200-1775838600@svec.org
SUMMARY:Characteristics of Successful Tech Hubs and Start-ups: Lessons for Engineers
DESCRIPTION:Silicon Valley is commonly acknowledged as the tech capital of the world. How did Silicon Valley come into being\, and what can we learn for our own careers? The story goes back to local Hams trying to break RCA's tube patents\, Stanford "angel" investors\, the sinking of the Titanic\, WW II and radar\, and the SF Bay Area infrastructure that developed –these factors pretty much determined that the semiconductor and IC industries would be located in the Santa Clara Valley\, and that the Valley would remain the world’s innovation center as new technologies emerge –digital\, then software\, biotech\, VR\, autonomous vehicles\, artificial intelligence\, LLMs –and be the model for innovation worldwide.\nThis talk will give an exciting and colorful history of development and innovation that began in Palo Alto in 1909. You'll meet some of the colorful characters –Cyril Elwell\, Lee De Forest\, Bill Eitel\, Charles Litton\, Fred Terman\, David Packard\, Bill Hewlett\, Bill Shockley and others –who came to define our worldwide electronics industries through their inventions and process development. You'll understand some of the novel management approaches that have become the hallmarks of its tech startups. In this talk\, the key Silicon Valley attributes will be illustrated and analyzed\, for consideration by engineers interested in creating their own start-ups and high-tech businesses\, working for them\, or simply understanding them.\nSpeaker(s): Paul Wesling\,\nBldg: Davidson Engineering Building\, San Jose State Unversity\, San Jose\, California\, United States\, Virtual: https://events.vtools.ieee.org/m/545434
URL:https://svec.org/event/characteristics-of-successful-tech-hubs-and-start-ups-lessons-for-engineers/
LOCATION:Bldg: Davidson Engineering Building\, San Jose State Unversity\, San Jose\, California\, United States\, Virtual: https://events.vtools.ieee.org/m/545434
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260410T185000
DTEND;TZID=America/Los_Angeles:20260410T200000
DTSTAMP:20260410T031340
CREATED:20260402T110312Z
LAST-MODIFIED:20260402T110312Z
UID:78233-1775847000-1775851200@svec.org
SUMMARY:Polymer-based transducers – a green world of opportunities
DESCRIPTION:The talk will explore some of the research projects in the Adaptive Microsystems (AdaMist) lab led by Dr. Cretu\, with an emphasis on a common vision and strategy. Polymer-based transducers\, fabricated using green\, rapid and low-cost processes\, have been used for inertial and ultrasonic transducers. MEMS accelerometers with piezoelectric polymers show the promise of novel microfabrication technologies\, while photosensitive polymers (SU-8) are the base of a new generation of CMUT (Capacitive Micromachined Ultrasonic Transducer) arrays. Poly-CMUT applications\, from custom small probes for biomedical imaging to industrial applications like nondestructive testing and monitoring\, open a new world of opportunities.\nSpeaker(s): Edmond Cretu\,\nVirtual: https://events.vtools.ieee.org/m/552485
URL:https://svec.org/event/polymer-based-transducers-a-green-world-of-opportunities/
LOCATION:Virtual: https://events.vtools.ieee.org/m/552485
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