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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260406T170000
DTEND;TZID=America/Los_Angeles:20260407T180000
DTSTAMP:20260404T035806
CREATED:20260206T094815Z
LAST-MODIFIED:20260206T094815Z
UID:77704-1775494800-1775584800@svec.org
SUMMARY:Spring Speaker Series Start
DESCRIPTION:Continuation of Stanford IEEE Speaker Series\nStanford\, California\, United States\, 94305
URL:https://svec.org/event/spring-speaker-series-start/
LOCATION:Stanford\, California\, United States\, 94305
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260407T180000
DTEND;TZID=America/Los_Angeles:20260407T194500
DTSTAMP:20260404T035806
CREATED:20260315T184812Z
LAST-MODIFIED:20260315T184812Z
UID:77879-1775584800-1775591100@svec.org
SUMMARY:SCV/OEB SSIT Chapter Meeting: Future of Work in the Age of AI
DESCRIPTION:April 7 6PM-7:30PM Member Techical Meeting at Santa Clara University – with Pizza:\nThis meeting will explore the Future of Work with speakers who will address the technical and business workforce environment given the changes that have transpired with the increasing use of generative and agentic AI. Our speakers include Claudionor Coelho\, Chief AI Officer at Majestic Labs ai as well as a to be named leader in AI business process applications.\nThe format will include conversation over pizza and formal speakers from 6:45-7:15\, concluding with open disucssion.\nAgenda:\nAGENDA – Various types of Pizza and drinks will be served\n–\nIntroductions\n– Panel The Future of Work: Claudionor Coelho\, Cheif AI officer at Zscaler\n–\nOpen Discussion\nRoom: 2116\, Bldg: Sobrato Campus for Discovery and Innovation (SCDI)\, Santa Clara University\, 500 El Camino Real\, Santa Clara\, California\, United States\, 95050\, Virtual: https://events.vtools.ieee.org/m/547984
URL:https://svec.org/event/scv-oeb-ssit-chapter-meeting-future-of-work-in-the-age-of-ai/
LOCATION:Room: 2116\, Bldg: Sobrato Campus for Discovery and Innovation (SCDI)\, Santa Clara University\, 500 El Camino Real\, Santa Clara\, California\, United States\, 95050\, Virtual: https://events.vtools.ieee.org/m/547984
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260409T123000
DTEND;TZID=America/Los_Angeles:20260409T140000
DTSTAMP:20260404T035806
CREATED:20260312T183306Z
LAST-MODIFIED:20260312T183306Z
UID:77866-1775737800-1775743200@svec.org
SUMMARY:Towards Building Natural Conversational Agents
DESCRIPTION:In this presentation\, I will present some of the recent progresses in building conversational agents\, with a focus on the speech modality. I will introduce desirable properties of such systems and explain some of the key concepts\, core ideas\, and main technologies developed in practical systems.\nSpeaker(s): \, Dong Yu\nVirtual: https://events.vtools.ieee.org/m/545402
URL:https://svec.org/event/towards-building-natural-conversational-agents/
LOCATION:Virtual: https://events.vtools.ieee.org/m/545402
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260410T120000
DTEND;TZID=America/Los_Angeles:20260410T130000
DTSTAMP:20260404T035806
CREATED:20260215T170305Z
LAST-MODIFIED:20260215T170305Z
UID:77763-1775822400-1775826000@svec.org
SUMMARY:Using Architectural Simulation to Investigate Chiplets for Scalable and Cost Effective HPC Beyond Exascale
DESCRIPTION:[]Chiplets have become a compelling approach to scaling and heterogeneous integration e.g. integrating workload-specific processors and massive bandwidth memory systems into computing systems; integrating die from multiple function-optimized process nodes into one product; integrating silicon from multiple businesses into one product. Chiplet-based products have been produced in high volume by multiple companies using proprietary chiplet ecosystems. Recently\, the community has proposed several new standards (e.g.\, UCIe) to facilitate integration and interoperability of any compliant chiplet. Hyperscalers (e.g.\, Google\, Amazon) are actively designing high volume products with chiplets through these open interfaces. Other communities are exploring the end-to-end workflow and tooling to assemble chiplet-based products. High performance computing can benefit from this trend. However\, the performance\, power\, and thermal requirements unique to HPC\, present many challenges to realizing a vision for affordable\, modular HPC using this new approach. Architectural modeling and simulation will play a critical role in pathfinding for this new potential direction for HPC beyond Exascale.\nSpeaker(s): John Shalf\,\nVirtual: https://events.vtools.ieee.org/m/539463
URL:https://svec.org/event/using-architectural-simulation-to-investigate-chiplets-for-scalable-and-cost-effective-hpc-beyond-exascale/
LOCATION:Virtual: https://events.vtools.ieee.org/m/539463
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260410T150000
DTEND;TZID=America/Los_Angeles:20260410T163000
DTSTAMP:20260404T035806
CREATED:20260308T183355Z
LAST-MODIFIED:20260308T183355Z
UID:77848-1775833200-1775838600@svec.org
SUMMARY:Characteristics of Successful Tech Hubs and Start-ups: Lessons for Engineers
DESCRIPTION:Silicon Valley is commonly acknowledged as the tech capital of the world. How did Silicon Valley come into being\, and what can we learn for our own careers? The story goes back to local Hams trying to break RCA's tube patents\, Stanford "angel" investors\, the sinking of the Titanic\, WW II and radar\, and the SF Bay Area infrastructure that developed –these factors pretty much determined that the semiconductor and IC industries would be located in the Santa Clara Valley\, and that the Valley would remain the world’s innovation center as new technologies emerge –digital\, then software\, biotech\, VR\, autonomous vehicles\, artificial intelligence\, LLMs –and be the model for innovation worldwide.\nThis talk will give an exciting and colorful history of development and innovation that began in Palo Alto in 1909. You'll meet some of the colorful characters –Cyril Elwell\, Lee De Forest\, Bill Eitel\, Charles Litton\, Fred Terman\, David Packard\, Bill Hewlett\, Bill Shockley and others –who came to define our worldwide electronics industries through their inventions and process development. You'll understand some of the novel management approaches that have become the hallmarks of its tech startups. In this talk\, the key Silicon Valley attributes will be illustrated and analyzed\, for consideration by engineers interested in creating their own start-ups and high-tech businesses\, working for them\, or simply understanding them.\nSpeaker(s): Paul Wesling\,\nBldg: Davidson Engineering Building\, San Jose State Unversity\, San Jose\, California\, United States\, Virtual: https://events.vtools.ieee.org/m/545434
URL:https://svec.org/event/characteristics-of-successful-tech-hubs-and-start-ups-lessons-for-engineers/
LOCATION:Bldg: Davidson Engineering Building\, San Jose State Unversity\, San Jose\, California\, United States\, Virtual: https://events.vtools.ieee.org/m/545434
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260410T185000
DTEND;TZID=America/Los_Angeles:20260410T200000
DTSTAMP:20260404T035806
CREATED:20260402T110312Z
LAST-MODIFIED:20260402T110312Z
UID:78233-1775847000-1775851200@svec.org
SUMMARY:Polymer-based transducers – a green world of opportunities
DESCRIPTION:The talk will explore some of the research projects in the Adaptive Microsystems (AdaMist) lab led by Dr. Cretu\, with an emphasis on a common vision and strategy. Polymer-based transducers\, fabricated using green\, rapid and low-cost processes\, have been used for inertial and ultrasonic transducers. MEMS accelerometers with piezoelectric polymers show the promise of novel microfabrication technologies\, while photosensitive polymers (SU-8) are the base of a new generation of CMUT (Capacitive Micromachined Ultrasonic Transducer) arrays. Poly-CMUT applications\, from custom small probes for biomedical imaging to industrial applications like nondestructive testing and monitoring\, open a new world of opportunities.\nSpeaker(s): Edmond Cretu\,\nVirtual: https://events.vtools.ieee.org/m/552485
URL:https://svec.org/event/polymer-based-transducers-a-green-world-of-opportunities/
LOCATION:Virtual: https://events.vtools.ieee.org/m/552485
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260414T190000
DTEND;TZID=America/Los_Angeles:20260414T210000
DTSTAMP:20260404T035806
CREATED:20260222T171803Z
LAST-MODIFIED:20260222T171803Z
UID:77793-1776193200-1776200400@svec.org
SUMMARY:Conversational AI: Practical Challenges in Talking to People
DESCRIPTION:This is a hybrid in-person and online event. Pre-registration is required for either.\nConversational AI systems today speak with remarkable confidence\, often giving the impression of understanding and reasoning. However\, teams deploying these systems often quickly encounter familiar problems: drift\, hallucinations\, contradictory answers\, and conversations that quietly lose their original purpose. Why do systems that seem so capable end up behaving so unpredictably?\nIn this talk\, Elena Gostrer will examine these behaviors from a practical\, product-engineering perspective. Rather than exploring model internals\, this talk will focus on what actually happens when humans interact with probabilistic language models – and why traditional software assumptions fail in conversational settings.\nElena will also discuss what architectural patterns teams are adopting to keep in control\, and she’ll highlight why combining generative AI with explicit structure\, state\, and constraints is becoming essential. Attendees will leave with a clearer understanding of why conversational AI breaks\, what helps it behave more reliably\, and how to think differently about designing human-AI interactions.\nSpeaker(s): Elena Gostrer\,\n925 Thompson Place\, Sunnyvale\, California\, United States\, 94085\, Virtual: https://events.vtools.ieee.org/m/541387
URL:https://svec.org/event/conversational-ai-practical-challenges-in-talking-to-people/
LOCATION:925 Thompson Place\, Sunnyvale\, California\, United States\, 94085\, Virtual: https://events.vtools.ieee.org/m/541387
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260415T070000
DTEND;TZID=America/Los_Angeles:20260415T080000
DTSTAMP:20260404T035806
CREATED:20260402T110323Z
LAST-MODIFIED:20260402T110323Z
UID:78235-1776236400-1776240000@svec.org
SUMMARY:Optical Sampling Thermoreflectance for 3D Heterogeneous Integration
DESCRIPTION:Th[]e transition to 3D heterogeneous integration has fundamentally changed the thermal characterization problem. Buried heat sources\, anisotropic thin-film materials\, through-silicon vias\, and multilayer stacked structures require measurement techniques with sub-micron spatial resolution\, depth sensitivity\, and a temporal range — capabilities that infrared thermography and Raman spectroscopy cannot reliably deliver at this level of structural complexity. This session presents optical sampling thermoreflectance as a practical\, commercially available solution\, with real measurement data from a university lab and an industrial FA environment.\nVirtual: https://events.vtools.ieee.org/m/551389
URL:https://svec.org/event/optical-sampling-thermoreflectance-for-3d-heterogeneous-integration/
LOCATION:Virtual: https://events.vtools.ieee.org/m/551389
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260415T170000
DTEND;TZID=America/Los_Angeles:20260415T180000
DTSTAMP:20260404T035806
CREATED:20260206T094815Z
LAST-MODIFIED:20260206T094815Z
UID:77705-1776272400-1776276000@svec.org
SUMMARY:Spring Speaker Series 2
DESCRIPTION:Continuation of Speaker Series at Stanford IEEE.\nStanford\, California\, United States\, 94305
URL:https://svec.org/event/spring-speaker-series-2/
LOCATION:Stanford\, California\, United States\, 94305
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260415T190000
DTEND;TZID=America/Los_Angeles:20260415T203000
DTSTAMP:20260404T035806
CREATED:20260314T183315Z
LAST-MODIFIED:20260314T183315Z
UID:77875-1776279600-1776285000@svec.org
SUMMARY:Advancing Clean Energy: Ontario's Darlington New Nuclear Project
DESCRIPTION:Ontario Power Generation’s Darlington New Nuclear Project (DNNP) is at the forefront of deploying Small Modular Reactor (SMR) technology in Canada\, anchored by the GE Vernova Hitachi BWRX-300. As North America’s first commercial\, grid-scale SMR\, DNNP plans up to four units totaling 1\,200 MW. The project introduces advanced safety features\, including natural circulation cooling\, integral isolation valves\, and passive heat removal\, while supporting thousands of jobs and boosting Ontario’s economy. A collaboration between OPG\, GE Vernova Hitachi\, AtkinsRéalis\, and Aecon-Kiewit\, DNNP strengthens Ontario’s clean energy leadership and sets a model for SMR deployment globally. With construction underway\, DNNP will help meet rising electricity demand\, advance electrification\, and deliver reliable\, carbon-free power\, showcasing nuclear innovation’s vital role in climate action and economic growth.\nSpeaker: Michael Takla\, Ontario Power Generation\nEvent Moderator: Dr. Maike Luiken\, PhD\, SMIEEE\, IEEE-HKN\, FEIC\, FCAE\, is managing director\, R&D\, at a start-up company\, Carbovate Development\, and Adjunct Research Professor\, Western University\, Canada.\nSpeaker(s): Michael Takla\, Maike Luiken\nAgenda:\nWe were given written permission to rebroadcast the Canadian earlier program which will be on April 1 at 9:00am.\nThe SCV Section Life Members Affinity Group program will be at the more convenient time on Apr 15\, 2026 at 07:00 PM Pacific Time\nVirtual: https://events.vtools.ieee.org/m/547687
URL:https://svec.org/event/advancing-clean-energy-ontarios-darlington-new-nuclear-project/
LOCATION:Virtual: https://events.vtools.ieee.org/m/547687
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=-07:00:20260420T183000
DTEND;TZID=-07:00:20260420T203000
DTSTAMP:20260404T035806
CREATED:20260310T180308Z
LAST-MODIFIED:20260310T180308Z
UID:77852-1776709800-1776717000@svec.org
SUMMARY:Labelled Deductive Systems for Logical Validation of LLM Output
DESCRIPTION:**TALK LOGISTICS:**\nMonday\, April 20\, 2026\n6:30 registration\, food\, networking.\n7:00 SFbayACM upcoming events\, introduce the speaker\n7:10 to 8:15 or 8:30 presentation\nThe Zoom and YouTube links will be provided here about 2-3 days before the event\nSFbayACM will support a local audience at VRP in Mountain View \n**TALK DESCRIPTION:**\nLarge language models (LLMs) often generate fluent but in-correct or unsupported statements\, commonly referred to as hallucinations. We propose a hallucination detection frame-work ValidLLP4LLM based on a Labeled Logic Program (LLP) architecture that integrates multiple reasoning paradigms\, including logic programming\, argumentation\, probabilistic inference\, and abductive explanation. By enriching symbolic rules with semantic\, epistemic\, and contextual labels and applying discourse-aware weighting\, the system prioritizes nucleus claims over peripheral statements during verification. Experiments on three benchmark datasets and a challenging clinical narrative dataset show that LLP consistently outperforms classical symbolic validators\, achieving the highest detection accuracy when combined with discourse modeling. A human evaluation further demonstrates that logic-assisted explanations improve both hallucination detection ac-curacy and user trust. The results suggest that labeled symbolic reasoning with discourse awareness provides a robust and interpretable approach to LLM verification in safety-critical domains. \n**SPEAKER BIO:**\nProf. Boris Galitsky has contributed linguistic and machine learning technologies to Silicon Valley startups as well as companies like eBay and Oracle for over 25 years. His information extraction and sentiment\nanalysis techniques assisted several acquisitions\, such as Xoopit by Yahoo\, Uptake by Groupon\, Loglogic by Tibco\, and Zvents by eBay. His security-related technologies of document analysis contributed to the acquisition of Elastica by Semantec. \nAs an architect of the Intelligent Bots project at Oracle\, he developed a discourse analysis technique used for dialogue management and published in the book Developing Enterprise Chatbots. He also published a two-volume monograph\, “AI for CRM”\, based on his experience developing Oracle Digital Assistant. He is an Apache committer to OpenNLP\, where he created OpenNLP. Similarity component\, which is a basis for a semantically enriched search engine and chatbot development. \nHis exploration and formalization of human reasoning culminated in the book AQ1 Computational Autism broadly used by parents of children with autism spectrum disorder and rehabilitation personnel. His\nfocus on the medical domain led to another research monograph\, “Artificial Intelligence for Healthcare Applications and Management”. He is a now a lead researcher at Moscow Institute for Physics and Technology\, Russia\nhttps://www.linkedin.com/in/boris-galitsky-342109204/ \n#ACM #SFbayACM #AI #GenAI #DataScience #LLM\n#Hallucinations #LogicProgramming #NLP #Discourse #Benchmark
URL:https://svec.org/event/labelled-deductive-systems-for-logical-validation-of-llm-output/
LOCATION:Valley Research Park\, 319 N Bernardo Ave\, Mountain View\, CA\, 94043\, United States
ATTACH;FMTTYPE=image/jpeg:https://svec.org/wp-content/uploads/2026/03/1024x576-bCQPfF.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260421T180000
DTEND;TZID=America/Los_Angeles:20260421T200000
DTSTAMP:20260404T035806
CREATED:20260402T110324Z
LAST-MODIFIED:20260402T110324Z
UID:78237-1776794400-1776801600@svec.org
SUMMARY:APEC 2026 Download - Highlighting Evolving Landscape of Power Electronics
DESCRIPTION:Join us at Santa Clara University for the APEC 2026 Download Event\, hosted by the IEEE PELS San Francisco Bay Area Chapter. This engaging session brings together engineers\, researchers\, and industry professionals to explore the most impactful moments and innovations presented at the Applied Power Electronics Conference (APEC) 2026.\nThe event will highlight key takeaways from technical sessions\, including emerging trends in wide bandgap semiconductors\, advances in high-efficiency power conversion\, AI-driven design optimization\, and next-generation energy systems. Attendees will gain valuable insights into cutting-edge research and real-world applications shaping the future of power electronics.\nIn addition\, we will cover standout keynote sessions\, offering perspectives from industry leaders on the evolving landscape of power electronics. The program aims to foster knowledge sharing\, networking\, and discussion within the local power electronics community.\nStudent Highlights:\nStudents are especially encouraged to attend! This is a great opportunity to:\n– Discover cutting-edge topics that can inspire your coursework\, senior projects\, or research direction\n– Learn directly from experts about industry expectations and emerging career paths in power electronics\n– Network with professionals and local engineers from leading companies in Silicon Valley\n– Gain exposure to real-world applications beyond the classroom\nWhether you attended APEC or want a curated overview of its most important developments\, this download event is an excellent opportunity to stay informed\, get inspired\, and expand your professional network.\nBldg: Sobrato Campus for Discovery and Innovation\, Santa Clara University\, 500 El Camino Real\, Santa Clara\, California\, United States\,  95053
URL:https://svec.org/event/apec-2026-download-highlighting-evolving-landscape-of-power-electronics/
LOCATION:Bldg: Sobrato Campus for Discovery and Innovation\, Santa Clara University\, 500 El Camino Real\, Santa Clara\, California\, United States\,  95053
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260422T110000
DTEND;TZID=America/Los_Angeles:20260422T140000
DTSTAMP:20260404T035806
CREATED:20260217T171807Z
LAST-MODIFIED:20260217T171807Z
UID:77777-1776855600-1776866400@svec.org
SUMMARY:Quarterly social meeting and program
DESCRIPTION:Reserve this date for a social gathering and a program of general interest to be determined. IEEE member fee is subsidized.\nAgenda:\nSocial meeting\, presentation\, and lunch. Select from buffet or order from menu depending on the number of registrations.\nBldg: Golf course restaurant\, not pro shop\, Beeb's Sports Bar and Grill\, 915 Club House Drive\, Livermore\, California\, United States
URL:https://svec.org/event/quarterly-social-meeting-and-program-2/
LOCATION:Bldg\, Livermore\, CA\, United States
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260423T113000
DTEND;TZID=America/Los_Angeles:20260423T131000
DTSTAMP:20260404T035806
CREATED:20260402T110324Z
LAST-MODIFIED:20260402T110324Z
UID:78238-1776943800-1776949800@svec.org
SUMMARY:Diamond Semiconductor Device Design & Fabrication
DESCRIPTION:Diamond Semiconductor Device Design & Fabrication\n[]\nAbstract:\nDiamond Quanta: making diamond as available as silicon\nSpeaker:\nAdam Khan\nFounder & CEO\nDiamond Quanta\nAGENDA:\nThursday April 23\, 2026\n11:30 AM: Networking\, Pizza & Drinks\nNoon — 1 pm: Seminar\nPlease register on Eventbrite before 9:30 AM on Thursday April 23\, 2026\n$4 IEEE members $6 non IEEE members\n(discounts for unemployed and students )\nBldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road\, EAG Labs\, 810 Kifer Road\, Sunnyvale\, California\, California\, United States\, 95051
URL:https://svec.org/event/diamond-semiconductor-device-design-fabrication/
LOCATION:Bldg: ==> Use corner entrance: Kifer Road / San Lucar Court ==> Do not enter at main entrance on Kifer Road\, EAG Labs\, 810 Kifer Road\, Sunnyvale\, California\, California\, United States\, 95051
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260425T093000
DTEND;TZID=America/Los_Angeles:20260425T110000
DTSTAMP:20260404T035806
CREATED:20260318T184811Z
LAST-MODIFIED:20260318T184811Z
UID:77893-1777109400-1777114800@svec.org
SUMMARY:SCV-EPS AdCom Meeting (APRIL 2026)
DESCRIPTION:Monthly AdCom meeting:\n1. Welcome – Hualiang\n2. Symposium status update – Annette/Paul/Hualiang\n3. Education outreach status – Masha/Azmat/Hualiang\n4. Chapter Storage – Hualiang XXXX NOT\n5. Monthly talk preparation – Chandan/Luu\n6. Chapter website update – XXXX NOT Venkatesh/Claire/Paul\n7. Senior member advancement – Dwayne\nXxxx NOT\n8: Election 2026\n9: Open discussion – All\nAgenda:\nMonthly AdCom meeting:\n1. Welcome – Hualiang\n2. Symposium status update – Annette/Paul/Hualiang\n3. Education outreach status – Masha/Azmat/Hualiang\n4. Chapter Storage – Hualiang XXXX NOT\n5. Monthly talk preparation – Chandan/Luu\n6. Chapter website update – XXXX NOT Venkatesh/Claire/Paul\n7. Senior member advancement – Dwayne\nXxxx NOT\n8: Election 2026\n9: Open discussion – All\nVirtual: https://events.vtools.ieee.org/m/549396
URL:https://svec.org/event/scv-eps-adcom-meeting-april-2026/
LOCATION:Virtual: https://events.vtools.ieee.org/m/549396
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260507T120000
DTEND;TZID=America/Los_Angeles:20260507T130000
DTSTAMP:20260404T035806
CREATED:20260311T183306Z
LAST-MODIFIED:20260311T183306Z
UID:77858-1778155200-1778158800@svec.org
SUMMARY:Power Distribution in Heterogeneous Integrated Packaging for Data Center Computing
DESCRIPTION:[]Join us for an insightful webinar with Francesco Carobolante\, founder of IoTissimo® LLC and an EPS Distinguished Lecturer\, as he explores the critical challenges and innovative solutions that advanced packaging can provide to address the "Power Wall". With over 30 years of industry experience and a tenure at Intel’s Corporate Strategy Office\, Francesco will delve into the Heterogeneous Integration Roadmap (HIR) perspective on scaling high-power AI processors. This session will analyze how signal BW and energy requirements dictate the options available for architecting the package structure\, including Vertical Power Delivery\, integrated voltage regulators and advanced thermal management techniques. Discover how these architectural shifts are enabling the next generation of data center performance.\nSpeaker(s): Francesco Carobolante\,\nVirtual: https://events.vtools.ieee.org/m/546237
URL:https://svec.org/event/power-distribution-in-heterogeneous-integrated-packaging-for-data-center-computing/
LOCATION:Virtual: https://events.vtools.ieee.org/m/546237
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260512T120000
DTEND;TZID=America/Los_Angeles:20260512T130000
DTSTAMP:20260404T035806
CREATED:20260120T174820Z
LAST-MODIFIED:20260120T174820Z
UID:77639-1778587200-1778590800@svec.org
SUMMARY:From Process to Performance: Challenges in uOLED and uLED Electronics Manufacturing
DESCRIPTION:As uOLED and uLED technologies transition from research to high-volume manufacturing\, system performance is increasingly constrained by process variability rather than design intent. Electrical\, thermal\, and mechanical decisions made during manufacturing directly translate into optical non-uniformity\, efficiency loss\, and reliability challenges. Understanding these process-to-performance linkages is critical for building scalable\, high-performance emissive display systems.\nVirtual: https://events.vtools.ieee.org/m/533601
URL:https://svec.org/event/from-process-to-performance-challenges-in-uoled-and-uled-electronics-manufacturing-2/
LOCATION:Virtual: https://events.vtools.ieee.org/m/533601
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260512T170000
DTEND;TZID=America/Los_Angeles:20260512T193000
DTSTAMP:20260404T035806
CREATED:20260402T110335Z
LAST-MODIFIED:20260402T110335Z
UID:78240-1778605200-1778614200@svec.org
SUMMARY:The Intelligence of the Machine.. The Rigor of the Road!!
DESCRIPTION:IEEE Event Agenda – Tuesday May 12\, 2026\n🔹 5:00 PM – 5:30 PM\nRegistration\, Refreshments\, Food & Networking (Meet & Greet)\nFeatured Speakers & Sessions\n🔹 5:30 PM – 6:15 PM\nTopic 1: Industry Talk – Standardizing Automotive Firmware for SDVs\nExperts from Mercedes-Benz\, Arm\, and Athos Silicon will discuss the urgent need for a standardized\, secure\, and vendor-agnostic firmware foundation.\nKey focus areas:\n– Overcoming fragmented firmware ecosystems\n– UEFI as a scalable automotive standard\n– Enabling functional safety\, cybersecurity\, and interoperability\n– Supporting chiplet-based and next-gen ADAS architectures\nSpeakers:\n– François Piednoël – (https://www.linkedin.com/in/francoispiednoel/)\n– Sachin Athanikar – (https://www.linkedin.com/in/sachin-athanikar-18ba5914/)\n– Dong Wei (https://www.linkedin.com/in/dongweimba/)\n🔹 6:15 PM – 6:45 PM\nTopic 2: Academic Keynote – Safe Embodied AI: From Theory to Deployment\nProf. Ding Zhao (Carnegie Mellon University)\nTopics include:\n– Rare-event safety in autonomous systems\n– Safe reinforcement and imitation learning\n– Generalizable and adaptive AI safety\n– Future of trustworthy embodied AI at scale\nSpeaker:\n– Ding Zhao – (https://www.linkedin.com/in/ding-zhao-01130730/)\n🔹 6:45 PM – 7:15 PM\nTopic 3: Industry Talk – Static Safety Is Dead: Continuous Risk & Compliance for SDVs\nAkshay Chalana (CEO & Co-founder\, Saphira AI)\nModern vehicles evolve continuously through software updates\, AI-driven functionality\, and increasing connectivity—yet safety and cybersecurity practices remain largely static.\nThis talk explores:\n– What breaks when traditional safety assumptions no longer hold\n– Real-world ADAS/autonomy failure propagation: dataset bias\, requirement drift\, and system boundary ambiguity\n– Cross-domain challenges between safety and cybersecurity\n– A new model for continuous\, system-aware risk assessment and compliance\n– Treating compliance artifacts as live infrastructure integrated into development pipelines\nThis session provides a practical path to maintaining certification-grade rigor while operating at software velocity.\nSpeaker:\n– Akshay Chalana – (https://www.linkedin.com/in/akshaychalana/)\n🔹 7:15 PM – 7:30 PM\nQ&A and open discussion – Aditi Ramadwar\nAbout This Technical Forum\nThis technical forum brings together OEMs\, Tier-1 suppliers\, semiconductor leaders\, researchers\, and innovators to address the challenge of fragmentation and define a unified\, future-ready mobility stack.\nWho Should Attend:\n– Automotive engineers and architects\n– Safety and cybersecurity specialists\n– Semiconductor and embedded systems professionals\n– Researchers in autonomous vehicles and AI safety\n– Technical decision-makers from OEMs and suppliers\n– Students in Automotive\, Compute\, Mechanical & Electrical Engineering\nWe would be delighted if you could join us and participate in shaping the future of intelligent transportation.\nSpeaker(s): Francois\, Wei \, Sachin\, Zhao\, Akshay\nSEMI\, 673 S Milpitas Blvd\, Milpitas\, California\, United States\, 95035
URL:https://svec.org/event/the-intelligence-of-the-machine-the-rigor-of-the-road/
LOCATION:SEMI\, 673 S Milpitas Blvd\, Milpitas\, California\, United States\, 95035
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260517T170000
DTEND;TZID=America/Los_Angeles:20260518T180000
DTSTAMP:20260404T035807
CREATED:20260206T094815Z
LAST-MODIFIED:20260206T094815Z
UID:77706-1779037200-1779127200@svec.org
SUMMARY:Spring Speaker Series 3
DESCRIPTION:Continuation of Speaker Series at Stanford IEEE.\nStanford\, California\, United States\, 94305
URL:https://svec.org/event/spring-speaker-series-3/
LOCATION:Stanford\, California\, United States\, 94305
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260519T080000
DTEND;TZID=America/Los_Angeles:20260520T170000
DTSTAMP:20260404T035807
CREATED:20260206T094815Z
LAST-MODIFIED:20260206T094815Z
UID:77708-1779177600-1779296400@svec.org
SUMMARY:Third Annual IEEE Build-Up Substrate Symposium
DESCRIPTION:[]\n(More information will be added in early March. General Registration should open around March 1st. Sponsors may register at the link below.)\nWe are living in the era of heterogeneous integration driven by fast\, efficient and big data computing resources at our fingertips. The mega-monolithic silicon chip is a thing of the past\, replaced with 3D heterogeneous integration of chiplets onto a platform made of an organic build-up substrate. Volume manufacturers of build-up substrates are entirely based in Asia\, leaving a desert in the US. Volume build-up substrates used by major IDMs are manufactured in Asian countries including Taiwan\, Japan and China.\nHowever\, there are multiple activities starting up in the US\, and this is why a gathering of the US players is important. This symposium is geared for all those involved in the supply chain of build-up substrates in the US\, as well as users. This Symposium is an opportunity for all build-up substrate players to meet\, network and cohesively work with funding agencies who will be invited to this symposium to focus on onshoring build-up substrate production and utilization.\nSamsung\, San Jose\, California\, United States
URL:https://svec.org/event/third-annual-ieee-build-up-substrate-symposium/
LOCATION:Samsung\, San Jose\, CA\, United States
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260519T090000
DTEND;TZID=America/Los_Angeles:20260520T170000
DTSTAMP:20260404T035807
CREATED:20260304T174831Z
LAST-MODIFIED:20260304T174831Z
UID:77832-1779181200-1779296400@svec.org
SUMMARY:IEEE Build-Up Substrate Symposium (BUSS)
DESCRIPTION:We are living in the era of heterogeneous integration driven by fast\, efficient and big data computing resources at our fingertips. The mega-monolithic silicon chip is a thing of the past\, replaced with 3D heterogeneous integration of chiplets onto a platform made of an organic build-up substrate. Volume manufacturers of build-up substrates are entirely based in Asia\, leaving a desert in the US. Volume build-up substrates used by major IDMs are manufactured in Asian countries including Taiwan\, Japan and China.\nHowever\, there are multiple activities starting up in the US\, and this is why a gathering of the US players is important. This symposium is geared for all those involved in the supply chain of build-up substrates in the US\, as well as users. As the US Congress debates H.R. 3249\, the Protecting Circuit Boards and Substrates (PCBS) Act\, this Symposium is an opportunity for all build-up substrate players to meet\, network and cohesively work with funding agencies who will be invited to this symposium to focus on onshoring build-up substrate production and utilization.\nlocation to be announced\, Milpitas\, California\, United States\, Virtual: https://events.vtools.ieee.org/m/544352
URL:https://svec.org/event/ieee-build-up-substrate-symposium-buss-2/
LOCATION:location to be announced\, Milpitas\, California\, United States\, Virtual: https://events.vtools.ieee.org/m/544352
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/New_York:20260525T210000
DTEND;TZID=America/New_York:20260526T170000
DTSTAMP:20260404T035807
CREATED:20260226T173312Z
LAST-MODIFIED:20260226T173312Z
UID:77809-1779742800-1779814800@svec.org
SUMMARY:IEEE Canada Blockchain Forum 2026 (4th edition)
DESCRIPTION:The IEEE Blockchain Forum is returning for the fourth time as part of (https://www.torontotechweek.com/). The goal of this compact one-day event is to congregate BUIDLers\, researchers\, academics\, and engineers building blockchain protocols\, infrastructure\, and decentralized software applications.\nNote: (https://events.vtools.ieee.org/m/469545) counted with 200 participants and speakers from JP Morgan\, the Bank of Canada\, Mastercard\, the Ethereum Enterprise Alliance\, EY\, Starknet\, among others.\n[]\nCo-sponsored by: Government of Ontario\nAgenda:\nAgenda TBC\nOntario Investment and Trade Centre\, 250 Yonge Street\, 35th Floor\, Toronto\, Ontario\, Canada\, M5B 2L7
URL:https://svec.org/event/ieee-canada-blockchain-forum-2026-4th-edition/
LOCATION:Ontario Investment and Trade Centre\, 250 Yonge Street\, 35th Floor\, Toronto\, Ontario\, Canada\, M5B 2L7
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260624T080000
DTEND;TZID=America/Los_Angeles:20260625T170000
DTSTAMP:20260404T035807
CREATED:20260319T184817Z
LAST-MODIFIED:20260319T184817Z
UID:77896-1782288000-1782406800@svec.org
SUMMARY:Center for Advanced Signal and Image Sciences (CASIS) 29th Annual Workshop
DESCRIPTION:We are thrilled to host LLNL’s 30th Center for Advanced Signal and Image Sciences (CASIS) workshop. The workshop returns with a full 2-day in-person schedule on Wednesday and Thursday\, June 24-25\, 2026.\nWe encourage a broad range of technical topics at the workshop and being non-archival apart from original work\, we are also considering intermediate results from ongoing efforts as well as recently published publications for presentation as a talk and/or a poster. The goal of the workshop is to provide a platform for the exchange of ideas and network with peers across disciplines to foster collaboration and build community. Please submit your abstract by Friday\, May 15\, 2026. Authors will be notified of the review decisions one week later on May 22\, 2026.\nApart from the regular presentation track we will feature parallel tutorials\, hands-on mini workshops and a dedicated student track to introduce career opportunities at LLNL.\nThe workshop will be held in-person at the (https://uclcc.org/) and requires pre-registration until June 18\, 2026. As this is a 2-day whole-day workshop\, we will provide coffee and snacks in morning and afternoon breaks as well as a lunch on both days. As this is our 30th anniversary\, we will also host a Happy Hour following the regular program on Wednesday\, June 24\, 2026.\n(https://engineering.llnl.gov/centers/casis/workshops)\nThis year’s workshop features presentations in the following tracks\, moderated by the Program Chairs:\n– AI/Machine Learning (PhanNguyen\, Kowshik Thopalli)\n– National Ignition Facility (Eugene Kur\, Christopher Miller)\n– Non-Destructive Evaluation (Seemeen Karimi\, Harry Martz)\n– Quantum Sensing & Quantum Computing (Kristi Beck)\n– Remote Sensing\, Non-Invasive Imaging & Inverse Problems (Sean Lehman\, Viacheslav Li)\n– Robotics & Automation (Aldair Gongora\, Abhik Sarkar)\n– Student Track: All topics (Poster only) (Ted Bauman\, Min Priest)\nBecome part of this great experience and submit your talk proposal at https://engineering.llnl.gov/centers/casis/workshops before May 15\, 2025!\nCheck out (https://www.llnl.gov/article/53041/annual-workshop-brings-together-signal-image-science-community) for last year’s amazing event to see what to expect!\nThe no-fee CASIS Workshop is sponsored by the (https://engineering.llnl.gov/) and held at the (https://uclcc.org/). It is organized by the (https://engineering.llnl.gov/centers/casis)\, and is a joint meeting with the local chapters of the (https://www.ewh.ieee.org/r6/oeb/SigProc/sigproc.html) and (https://r6.ieee.org/sfoeb-cs/). supported by the (https://r6.ieee.org/oeb/).\nCo-sponsored by: Lawrence Livermore National Laboratory – Center for Advanced Signal and Image Sciences\nBldg: Building 661 L-794\, University of California Livermore Collaboration Center\, 7000 East Ave\, Livermore\, California\, United States\, 94550
URL:https://svec.org/event/center-for-advanced-signal-and-image-sciences-casis-29th-annual-workshop-2/
LOCATION:Bldg: Building 661 L-794\, University of California Livermore Collaboration Center\, 7000 East Ave\, Livermore\, California\, United States\, 94550
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