BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//Silicon Valley Engineering Council - ECPv6.17.1//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:Silicon Valley Engineering Council
X-ORIGINAL-URL:https://svec.org
X-WR-CALDESC:Events for Silicon Valley Engineering Council
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20260308T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20261101T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20270314T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20271107T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VTIMEZONE
TZID:-07:00
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260908T190000
DTEND;TZID=America/Los_Angeles:20260908T210000
DTSTAMP:20260625T164807Z
CREATED:20260625T164807Z
LAST-MODIFIED:20260625T164807Z
UID:78559-1788894000-1788901200@svec.org
SUMMARY:Rewired for AI: An Introduction to UltraEthernet
DESCRIPTION:As AI and HPC workloads scale exponentially\, traditional network fabrics are hitting a critical bottleneck. Legacy Ethernet simply wasn’t built for the ultra-low latency and zero-loss tolerances demanded by next-generation clusters. This talk will provide an engineering-first primer on UltraEthernet—the industry’s collaborative answer to modern data center scaling.\nRip Sohan will dissect the architectural gaps of legacy networks\, analyze the new data plane building blocks\, and unpack the specification’s advanced congestion control and reliability mechanisms. He will also explore how UltraEthernet integrates with existing RDMA ecosystems. Attendees will leave with a definitive mental model of the fabric designed to power the future of compute.\nSpeaker(s): Rip Sohan\,\n925 Thompson Place\, Sunnyvale\, California\, United States\, 94085\, Virtual: https://events.vtools.ieee.org/m/565084
URL:https://svec.org/event/rewired-for-ai-an-introduction-to-ultraethernet/
LOCATION:925 Thompson Place\, Sunnyvale\, California\, United States\, 94085\, Virtual: https://events.vtools.ieee.org/m/565084
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260910T183000
DTEND;TZID=America/Los_Angeles:20260910T200000
DTSTAMP:20260713T181808Z
CREATED:20260713T181808Z
LAST-MODIFIED:20260713T181808Z
UID:78651-1789065000-1789070400@svec.org
SUMMARY:Permanent Magnets\, A Material in Flux
DESCRIPTION:Dr. Stan Trout of Spontaneous Materials will discuss how changing tariffs\, domestic sourcing requirements\, and global market forces are reshaping the permanent magnet industry and what these trends mean for its future. With nearly 50 years of experience in permanent magnets\, magnetic materials\, and rare-earth technologies\, Dr. Trout is widely recognized as a leading authority in the field.\nFor more information\, see (https://scvmag.org/event/20260910/)\nSpeaker(s): Dr. Stan Trout\nQuadrant Corp\, 1120 Ringwood Ct.\, San Jose\, California\, United States\, 95131\, Virtual: https://events.vtools.ieee.org/m/567538
URL:https://svec.org/event/permanent-magnets-a-material-in-flux/
LOCATION:Quadrant Corp\, 1120 Ringwood Ct.\, San Jose\, California\, United States\, 95131\, Virtual: https://events.vtools.ieee.org/m/567538
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260911T180000
DTEND;TZID=America/Los_Angeles:20260911T200000
DTSTAMP:20260729T184831Z
CREATED:20260729T184831Z
LAST-MODIFIED:20260729T184831Z
UID:78704-1789149600-1789156800@svec.org
SUMMARY:Decoding the Invisible: Latent Representation and the Future of Human-AI Interaction
DESCRIPTION:Modern AI does not understand pixels or words. It understands latent structure. As these invisible representations become the language through which humans and machines communicate\, they will fundamentally redefine how we create\, discover\, and collaborate. This lecture reveals the mathematics behind these hidden spaces and explores why they may become the most important interface between human intelligence and artificial intelligence.\nThis lecture explores the evolution of latent representations from Variational Autoencoders\, which first learned meaningful probabilistic embeddings\, to Generative Adversarial Networks\, which demonstrated photorealistic generation while exposing challenges in stability and control\, and finally to diffusion models and Stable Diffusion\, which combine exceptional image quality with unprecedented controllability and robustness.\nBeyond the algorithms\, the talk examines how latent representations are transforming human-AI interaction. By enabling AI systems to reason\, generate\, and collaborate through shared abstract representations\, they are reshaping creativity\, scientific discovery\, healthcare\, education\, and engineering. Understanding these hidden spaces offers not only insight into how modern AI works\, but also a glimpse into a future where humans and intelligent machines communicate and co-create in entirely new ways.\nNote:\n– You will require a Zoom account (free to obtain) to join the meeting. This requirement is to avoid Zoom bombing. Please sign in using the email address tied to your Zoom account\, not necessarily the one you used to register for the event.\n– By registering for this event\, you agree that IEEE and the organizers are not liable to you for any loss\, damage\, injury\, or any incidental\, indirect\, special\, consequential\, or economic loss or damage (including loss of opportunity\, exemplary or punitive damages). The event will be recorded and will be made available for public viewing.\nCo-sponsored by: Vishnu S. Pendyala\, SJSU\nSpeaker(s): Dr. Narayan Srinivasa\, IEEE Fellow \, Dr. Vishnu S. Pendyala\nVirtual: https://events.vtools.ieee.org/m/570049
URL:https://svec.org/event/decoding-the-invisible-latent-representation-and-the-future-of-human-ai-interaction/
LOCATION:Virtual: https://events.vtools.ieee.org/m/570049
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BEGIN:VEVENT
DTSTART;TZID=-07:00:20260916T190000
DTEND;TZID=-07:00:20260916T210000
DTSTAMP:20260506T213309Z
CREATED:20260506T213309Z
LAST-MODIFIED:20260506T213309Z
UID:78404-1789585200-1789592400@svec.org
SUMMARY:Beyond the Buzzwords: The Real Engineering Challenges of Augmented Reality
DESCRIPTION:LOCATION ADDRESS (Hybrid\, in person or by zoom\, you choose)\nValley Research Park\n319 North Bernardo Avenue\nMountain View\, CA CA 93043\nDon’t use the front door. When facing the front door\, turn right along the front of the building. Turn left around the building corner. The 2nd door should be open and have a banner and event registration. \nIf you want to join remotely\, you can submit questions via Zoom Q&A. The zoom link:\n[https://acm-org.zoom.us/j/95226212956?pwd=HnAedzSDGcYAYsCzTuavIvMYMFtILa.1](https://acm-org.zoom.us/j/95226212956?pwd=HnAedzSDGcYAYsCzTuavIvMYMFtILa.1)\nJoin via YouTube:\n[https://youtube.com/live/cu5TDl8N2Mk](https://youtube.com/live/cu5TDl8N2Mk) \nAGENDA\n6:30 Door opens\, food and networking (we invite honor system contributions)\n**7:00** SFBayACM upcoming events\, introduce the speaker\n7:15 speaker presentation starts\n8:15 – 8:30 finish\, depending on Q&A \nJoin SF Bay ACM Chapter for an insightful discussion on: \n**Talk Description**:\nTalk description: Augmented Reality is often talked about in terms of its potential\, but what does it actually take to build it? This talk offers a candid\, high-level look at the engineering challenges that make AR glasses hard\, from power and thermals to silicon design\, and what it means to optimize at every layer of the stack to bring a product to life. \nReading material/blogs:\n[https://www.meta.com/blog/orion-ar-glasses-augmented-reality/](https://www.meta.com/blog/orion-ar-glasses-augmented-reality/)\n[https://www.meta.com/blog/boz-to-the-future-episode-22-wearables-orion-ray-ban-meta-alex-himel/](https://www.meta.com/blog/boz-to-the-future-episode-22-wearables-orion-ray-ban-meta-alex-himel/)\n[https://www.meta.com/blog/orion-compute-puck-reality-labs-next-computing-platform/](https://www.meta.com/blog/orion-compute-puck-reality-labs-next-computing-platform/)\n[https://www.meta.com/blog/orion-custom-silicon-chips-ip-blocks-accelerators-ar-algorithms-energy-efficiency-reality-labs/](https://www.meta.com/blog/orion-custom-silicon-chips-ip-blocks-accelerators-ar-algorithms-energy-efficiency-reality-labs/) \n**Speaker Bio**:\n**Shanmathi Natarajan is a Silicon Power Architect with experience at Meta Reality Labs\, where she led end-to-end power architecture for next-generation AR glasses. Her work spanned the full silicon lifecycle\, from early-stage SoC power modeling and architectural exploration to post-silicon validation and real-world correlation\, with a focus on turning high-level design intent into measurable efficiency gains on final silicon.**\n**Her work includes driving significant use-case power reductions on wearable SoCs\, directly enabling better battery life and user experience on AR devices. Her expertise spans low-power design methodologies\, hardware-software co-design\, DVFS and power state architecture\, and cross-layer optimization across compute\, memory\, and interconnect subsystems.**\n**Her research interests lie at the hardware-software boundary\, where low-level architectural decisions in AR glasses\, GPU architectures\, and energy-constrained systems translate directly into product-level impact.** \nhttps://www.linkedin.com/in/shanmathi-natarajan \n— \nValley Research Park is a coworking research campus of 104\,000 square feet hosting 60+ life science and technology companies. VRP has over 100 dry labs\, wet labs\, and high power labs sized from 125-15\,000 square feet. VRP manages all of the traditional office elements: break rooms\, conference rooms\, outdoor dining spaces\, and recreational spaces. \nAs a plug-and-play lab space\, once companies have secured their next milestone and are ready to expand\, VRP has 100+ labs ready to expand into.\nhttps://www.valleyresearchpark.com/
URL:https://svec.org/event/beyond-the-buzzwords-the-real-engineering-challenges-of-augmented-reality/
LOCATION:Valley Research Park\, 319 N Bernardo Ave\, Mountain View\, CA\, 94043\, United States
ATTACH;FMTTYPE=image/jpeg:https://svec.org/wp-content/uploads/2026/05/1024x576-s1XBmH.jpg
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260923T173000
DTEND;TZID=America/Los_Angeles:20260923T203000
DTSTAMP:20260730T184807Z
CREATED:20260730T184807Z
LAST-MODIFIED:20260730T184807Z
UID:78708-1790184600-1790195400@svec.org
SUMMARY:Critical Power Systems: Design & NEC Requirements
DESCRIPTION:Santa Clara Valley IEEE Power & Energy and Industry Applications Societies\nJoin us for a presentation and discussion on: Critical Power Systems: Design & NEC Requirements\nSpeaker: Tyler Shewbert\, P.E.\, Field Application Engineer\, Eaton’s Bussmann Division\nCost: IEEE Members $30\, Non-Members $40 by 9/17 (https://events.vtools.ieee.org/m/570048)\nDate: September 23\, 2026\, 5:30 to 8:30 PM\nPlace: Delta/Marriott Hotel\, 2151 Laurelwood Road\, Santa Clara CA 95054.\nAbout the Talk\nThis presentation provides an overview of National Electrical Code (NEC) requirements for Critical Power Systems. It will highlight how these systems support life safety\, business continuity\, and mission-critical operations.\nTopics include:\n– The differences between 700 (Emergency Systems)\, 701 (Legally Required Standby Systems)\, systems\, including permitted loads\, transfer requirements\, and operational expectations.\n– NEC requirements for selective coordination of overcurrent protective devices and the impact on system reliability and fault isolation.\n– Separation requirements for emergency and standby feeders\, wiring methods\, raceways\, and equipment locations.\n– Generator considerations.\n– Battery energy storage systems (BESS) and UPS applications for critical power continuity.\n– Grounding and bonding considerations for separately derived systems and transfer switch configurations.\n– An overview of Article 708 Critical Operations Power Systems (COPS)\nAttendees will gain a clear understanding of NEC compliance requirements and practical design strategies that improve system reliability\, maintainability\, and resiliency. This presentation will be of value to contractors\, consulting engineers\, AHJs\, and facility engineers\,\nRegistration required:\nAfter 9/17\, registration will be $5 more and non-refundable due to hotel final meal commitment.\n(https://r6.ieee.org/scv-pesias/) and (https://events.vtools.ieee.org/m/570048)\nWe look forward to seeing you there!\nSpeaker(s): Tyler Shewbert\nAgenda:\nAgenda:\n5:30 Check in\, Meet and Greet\n6:30 Dinner buffet\n7:00 Talk\n8:00 Q&A\n8:30 Conclude\nRoom: Parking validation may be required\, Bldg: Delta/Marriott Hotel Santa Clara-Silicon Valley\, 2151 Laurelwood Road\, Santa Clara\, California\, United States\, 95054
URL:https://svec.org/event/critical-power-systems-design-nec-requirements/
LOCATION:Room: Parking validation may be required\, Bldg: Delta/Marriott Hotel Santa Clara-Silicon Valley\, 2151 Laurelwood Road\, Santa Clara\, California\, United States\, 95054
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260924T113000
DTEND;TZID=America/Los_Angeles:20260924T130000
DTSTAMP:20260711T180307Z
CREATED:20260711T180307Z
LAST-MODIFIED:20260711T180307Z
UID:78642-1790249400-1790254800@svec.org
SUMMARY:Glass-Core Packaging and Its Reliability
DESCRIPTION:In the past few years\, because of high-performance computing (HPC) driven by artificial intelligence (AI) and data centers in this AI era\, packaging using glass-core substrates has been attracting lots of traction. For example\, among others\, Intel’s one-trillion-transistors application processor with glass-core substrate is to be shipped by the end of 2030 (announced September 2023) and TSMC’s chip-on-panel-on-substrate (CoPoS) with glass-core interposer is to be shipped in Q1 of 2029 (announced April 2025). In this lecture\, a brief fundamental of through-glass via (TGV) and redistribution-layers (RDLs) of glass packaging will be presented. The advantages and disadvantages of glass\, silicon\, and organic will be discussed. Panel-level packaging vs. wafer-level packaging and the panel size will also be provided. Finally\, the effects of coefficient of thermal expansion (CTE) of glass-core substrate on the solder joint reliability on printed circuit board (PCB) will be presented. Some recommendations will be provided.\nSpeaker(s): John Lau\,\nSEMI World Headquarters\, 673 South Milpitas Blvd\, Milpitas\, California\, United States\, 95050
URL:https://svec.org/event/glass-core-packaging-and-its-reliability/
LOCATION:SEMI World Headquarters\, 673 South Milpitas Blvd\, Milpitas\, California\, United States\, 95050
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BEGIN:VEVENT
DTSTART;TZID=-07:00:20260928T190000
DTEND;TZID=-07:00:20260928T210000
DTSTAMP:20260602T223307Z
CREATED:20260602T223307Z
LAST-MODIFIED:20260602T223307Z
UID:78460-1790622000-1790629200@svec.org
SUMMARY:Practical Lessons from Building AI Infrastructure for Billion User Products
DESCRIPTION:Practical Lessons from Building AI Infrastructure for Billion-User Products with ML Systems \nLOCATION ADDRESS (Hybrid\, in person or by zoom\, you choose)\nValley Research Park\n319 North Bernardo Avenue\nMountain View\, CA CA 93043\nIf you want to join remotely\, you can submit questions via Zoom Q&A. The zoom link:\n[https://acm-org.zoom.us/j/](https://acm-org.zoom.us/j/99320216248?pwd=hmIZXJbNiS0F4hrJerx0ffnI8rbYOr.1)\nJoin via YouTube:\nhttps://youtube.com/live/sJ38lsfLfeU \nAGENDA\n6:30 Door opens\, SFBAY ACM 68 anniversary Cake and networking (we invite honor system contributions)\n**7:00** Upcoming events\, introduction of the speaker\n7:15 Speaker presentation\n8:15- 8:30 finish\, depending on Q&A \nJoin SF Bay ACM Chapter for an insightful discussion on: \nAbstract\nThis talk covers what it takes to move ML/AI systems from promising prototypes to production systems that are reliable\, observable\, scalable\, and maintainable. I will discuss common architecture patterns\, rollout strategies\, evaluation and monitoring loops\, operational failure modes\, and engineering tradeoffs that show up at large scale. The talk is intended for experienced computing professionals and can be adjusted to a 45-60 minute format with Q&A. \nSpeaker bio:\nSilu Panda is a Sr. Software Engineer at Linkedin.com. He has 6 years of experience building ML infrastructure used by billions of users\, including 4 years at LinkedIn. He holds a bachelors degree in computer science from IIT Bombay. His focus areas are ML systems\, scalable infrastructure\, software engineering\, and practical AI product execution.. \nhttps://www.linkedin.com/in/silupanda/ \n— \nValley Research Park is a coworking research campus of 104\,000 square feet hosting 30+ life science and technology companies. VRP has over 100 dry labs\, wet labs\, and high power labs sized from 125-15\,000 square feet. VRP manages all of the traditional office elements: break rooms\, conference rooms\, outdoor dining spaces\, and recreational spaces. \nAs a plug-and-play lab space\, once companies have secured their next milestone and are ready to expand\, VRP has 100+ labs ready to expand into.\nhttps://www.valleyresearchpark.com/
URL:https://svec.org/event/practical-lessons-from-building-ai-infrastructure-for-billion-user-products/
LOCATION:Valley Research Park\, 319 N Bernardo Ave\, Mountain View\, CA\, 94043\, United States
ATTACH;FMTTYPE=image/jpeg:https://svec.org/wp-content/uploads/2026/06/1024x576-mQJE6V.jpg
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