Bell Labs’ Critical BELLMAC-32 Microprocessor Legacy

This is a hybrid in-person and online event. Pre-registration is required for either.
>> DIFFERENT LOCATION FOR IN-PERSON MEETING THIS MONTH!
This presentation will discuss the pioneering microprocessor R&D efforts at Bell Labs in 1976-1982 which created a new chip architecture and physical design. New test and verification methods were needed to overcome challenges in CMOS fabrication, and many of this project’s inventions were forerunners of subsequent VLSI developments:
– high-speed domino circuits to reduce complex logic gate delay times,
– a twin-tub CMOS process for improved power efficiency and performance,
– interconnect-centric logic design for signal delay reduction,
– gate-matrix layout which increased density,
– 32-bit wide internal and external transfers, and
– instructions which implemented certain UNIX operating system and C programming language operations
As explained by Michael Condry in an (https://spectrum.ieee.org/bellmac-32-ieee-milestone), this device was designed with the intention of carrying both voice and computation into the future, and CMOS was seen as a promising—but risky—alternative to the NMOS and PMOS designs then in use.
During this talk, three of the project leaders will describe how their team overcame numerous obstacles, and how they exceeded their speed goal with a 6.4 MHz device in 2.5 micrometer CMOS technology. These efforts created the BELLMAC-32 series of microprocessors, whose applications included telephony products. Their work was recognized this year with an (https://ieeemilestones.ethw.org/Milestone-Proposal:Development_of_the_Bellmac_Microprocessor,_1980).
Speaker(s): Michael Condry, Sung (Steve) Mo Kang , Victor Huang
925 Thompson Place, Sunnyvale, California, United States, 94085, Virtual: https://events.vtools.ieee.org/m/507828