AI Compute Orchestration: From Silicon to Systems

Stanford IEEE, co-hosted with the IEEE Circuits and Systems Society (CASS) and Samsung Semiconductor, is holding a half-day technical workshop on how AI compute is designed and orchestrated, from the transistor up to the datacenter. It is open to Stanford students, staff, and faculty along with guests from the co-hosting organizations, and is aimed especially at undergraduate and graduate students in electrical engineering and computer science.
The program features talks and a panel from industry and Stanford faculty speakers, covering AI software, circuit design, advanced packaging, and hardware co-design, with time for audience Q&A. Speakers will be announced soon.
Admission is free and no registration is needed. Just show up! Light refreshments and lunch will be provided.
Details: https://luma.com/kv8u97ga
Co-sponsored by: IEEE Circuits and Systems Society (CASS); Samsung Semiconductor
Room: 101X, Bldg: Paul G. Allen Building, 420 Via Palou, Stanford, California, United States, 94305