Digital Lithography: Addressing Scaling Challenges in Advanced Packaging
Virtual: https://events.vtools.ieee.org/m/502777[] Requirements on the high-performance compute (HPC) systems from AI workloads necessitates transition to larger package sizes with 2.5D to 3.5D integration and density scaling at every level in the stack. Several competing packaging architectures are emerging to solve the compute and power efficiency challenge presented by AI workloads. Each presents unique lithography challenges such […]