Using Architectural Simulation to Investigate Chiplets for Scalable and Cost Effective HPC Beyond Exascale
[]Chiplets have become a compelling approach to scaling and heterogeneous integration e.g. integrating workload-specific processors and massive bandwidth memory systems into computing systems; integrating die from multiple function-optimized process nodes into one product; integrating silicon from multiple businesses into one product. Chiplet-based products have been produced in high volume by multiple companies using proprietary chiplet […]
